CCS DEBUG模式 出错 - TMS320C6678 - 嵌入式开发者社区 - 51ele.net
设为首页收藏本站

嵌入式开发者社区

 找回密码
 立即注册

QQ登录

只需一步,快速开始

查看: 3985|回复: 1

[已解决] CCS DEBUG模式 出错

[复制链接]

32

主题

72

帖子

499

积分

中级会员

Rank: 3Rank: 3

积分
499
发表于 2018-6-14 22:00:32 | 显示全部楼层 |阅读模式
本帖最后由 xiaoluoshan 于 2018-6-16 11:50 编辑


我使用的是创龙 例程uart2,首先这个例程是没有问题的,CCS工程也是没有问题的,因为我在创龙开发板上可以正常进入debug模式,也可以正常启动;


有硬件工程师提供的两套板子,板子的设计是一样的,参考创龙底板的设计;
现在遇到的问题是:
在一块板子上,可以正常的进入debug模式;另一块板子提示如下错误:
C674X_0: File Loader: Verification failed: Values at address 0xC0103060 do not match Please verify target memory and memory map.
C674X_0: GEL: File: D:\share\DSP\demo\SYSBIOS\Application\UART2\Debug\UART2.out: a data verification error occurred, file load failed.




我又测试  创龙提供的  test 测试XDS V2 连接,是成功的;
[Start: Texas Instruments XDS100v2 USB Emulator_0]
Execute the command:
%ccs_base%/common/uscif/dbgjtag -f %boarddatafile% -rv -o -F inform,logfile=yes -S pathlength -S integrity
[Result]
-----[Print the board config pathname(s)]------------------------------------
C:\Users\tide.sun\AppData\Local\TEXASI~1\CCS\TI\2\1\BrdDat\testBoard.dat
-----[Print the reset-command software log-file]-----------------------------
This utility has selected a 100- or 510-class product.
This utility will load the adapter 'jioserdesusb.dll'.
The library build date was 'Jul 27 2016'.
The library build time was '18:31:37'.
The library package version is '6.0.407.3'.
The library component version is '35.35.0.0'.
The controller does not use a programmable FPGA.
The controller has a version number of '4' (0x00000004).
The controller has an insertion length of '0' (0x00000000).
This utility will attempt to reset the controller.
This utility has successfully reset the controller.
-----[Print the reset-command hardware log-file]-----------------------------
The scan-path will be reset by toggling the JTAG TRST signal.
The controller is the FTDI FT2232 with USB interface.
The link from controller to target is direct (without cable).
The software is configured for FTDI FT2232 features.
The controller cannot monitor the value on the EMU[0] pin.
The controller cannot monitor the value on the EMU[1] pin.
The controller cannot control the timing on output pins.
The controller cannot control the timing on input pins.
The scan-path link-delay has been set to exactly '0' (0x0000).
-----[The log-file for the JTAG TCLK output generated from the PLL]----------
There is no hardware for programming the JTAG TCLK frequency.
-----[Measure the source and frequency of the final JTAG TCLKR input]--------
There is no hardware for measuring the JTAG TCLK frequency.
-----[Perform the standard path-length test on the JTAG IR and DR]-----------
This path-length test uses blocks of 64 32-bit words
The test for the JTAG IR instruction path-length succeeded.
The JTAG IR instruction path-length is 6 bits.
The test for the JTAG DR bypass path-length succeeded.
The JTAG DR bypass path-length is 1 bits.
-----[Perform the Integrity scan-test on the JTAG IR]------------------------
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG IR Integrity scan-test has succeeded.
-----[Perform the Integrity scan-test on the JTAG DR]------------------------
This test will use blocks of 64 32-bit words.
This test will be applied just once.
Do a test using 0xFFFFFFFF.
Scan tests: 1, skipped: 0, failed: 0
Do a test using 0x00000000.
Scan tests: 2, skipped: 0, failed: 0
Do a test using 0xFE03E0E2.
Scan tests: 3, skipped: 0, failed: 0
Do a test using 0x01FC1F1D.
Scan tests: 4, skipped: 0, failed: 0
Do a test using 0x5533CCAA.
Scan tests: 5, skipped: 0, failed: 0
Do a test using 0xAACC3355.
Scan tests: 6, skipped: 0, failed: 0
All of the values were scanned correctly.
The JTAG DR Integrity scan-test has succeeded.
[End: Texas Instruments XDS100v2 USB Emulator_0]

本帖子中包含更多资源

您需要 登录 才可以下载或查看,没有帐号?立即注册

x
回复

使用道具 举报

4

主题

188

帖子

1698

积分

禁止发言

积分
1698
发表于 2018-7-5 10:56:31 | 显示全部楼层
提示: 作者被禁止或删除 内容自动屏蔽
回复 支持 反对

使用道具 举报

您需要登录后才可以回帖 登录 | 立即注册

本版积分规则

QQ|手机版|小黑屋|嵌入式开发者社区 ( 粤ICP备15055271号

GMT+8, 2024-3-29 16:56 , Processed in 0.038200 second(s), 25 queries .

Powered by Discuz! X3.2

© 2001-2015 Comsenz Inc.

快速回复 返回顶部 返回列表